Tuesday, January 15, 2013

What is “Register-less Architecture”?

“Register-less Architecture” is literally an architecture of a microprocessor omitting register.  That said, a processor with no register cannot do anything.  Therefore, the processor in this case has minimal register and can also use its main memory as general-purpose register.

Several classic processors prior to RISC substituted part of main memory for register.
A typical example was the 8-bit CPU 6502, used in Apple II and Commodore machines.  Instead of little internal register, the CPU 6502 had 256byte area from address 0 to 255 of its main memory available as a zero page going for virtual general-purpose register.  This kind of designing was possible at that time because of a small difference in the speed of the internal register and the external main memory with a CPU no faster than 1 to 2 MHz in the clock speed.

Current high-performance processors, operating by GHz unit internally, depend on lots of register and cache memory.  However, the circumstances are different when we use a FPGA as a microcontroller accommodating main memory and a processor.  This configuration has no need of external memory, but has to allocate the precious internal memory resource to register file and main memory.  Therefore, the more register turns to be the less main memory.  As the register and the main memory use the same internal memory after all, there is little effect in reducing access to main memory by using register.

In this context, the primary feature of the “register-less architecture” is that the entire memory embedded in a FPGA is available as main memory.

Another significant feature of the architecture is multi-core availability.
Multi-core is a form of multiprocessor, and simply put, an IC packed with several core processors.  In earlier times, ICs were in such a low degree of integration that processors were usually packaged separately.  While processors communicate signals in many lines at high speed, designing mainboard PCB was all the more complicated and in need of advanced techniques.  The increasing packaging density of processors enabled the implementation of multi-core integration, which is so compact and eases designing PCB, and eventually most multiprocessors in current use are multi-core processors.

Designing mainboard may sound like mission impossible to hobby users, once multiprocessors emit high-speed signals externally on PCB, but it is achievable just by struggling with EDA tools, as long as it is all about inside FPGA.  Once packing multi-core processor and main memory into a FPGA, all you need is a hardware description language for complete design.  Therefore, this would be almost the only way for hobby users to design a system with multi-core so far.  However, this method requires a multi-core processor with (commonly incredible) compact circuit so as to fit in a FPGA unit.  Register-less architecture also serves as a design methodology for it.

To be continued…

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